TSMC: The Leading Edge, and Who Pays to Build It
A foundry that earns software margins on manufacturing, defended by a process lead and a packaging bottleneck — with the demand now concentrated in a single platform and the risk quietly relocated onto the customers funding the buildout.
What this desk is watching
TSMC does not sell chips; it sells the leading edge of manufacturing to whoever designs the chip. Apple, Nvidia, AMD, and the hyperscalers own the silicon; TSMC owns the ability to make it, at densities no rival can match at volume. In the quarter ended 31 March 2026 that business produced US$35.90bn of revenue, up 40.6 per cent on the year in dollar terms, at a 66.2 per cent gross margin and a 50.5 per cent net margin.1 A contract manufacturer earning two-thirds gross margin is doing something a contract manufacturer should not be able to do, and this dossier is about the mechanism that permits it — a process lead and a packaging chokepoint — and the two facts that are quietly changing the shape of the risk beneath it.
Read those four together. The margin is the moat's financial signature; the 74 per cent of wafer revenue coming from the advanced nodes1 is its technical basis; the 61 per cent of revenue now coming from a single platform2 is the concentration the AI cycle has produced; and the US$52-56bn the company plans to spend this year3 is the price of holding all three. The business is the story. The tape, at the end, is the footnote.
The moat is a node lead, and it is countable
"Dominant foundry" is where the analysis starts, not where it ends. The mechanism is process-node leadership: TSMC brings each new generation of transistor to high-volume manufacturing at yields its competitors reach years later, if at all, and it charges for the gap. The proof is in the revenue mix by node. In the first quarter of 2026, 3-nanometer wafers — the newest generation in volume, and the most expensive — accounted for 25 per cent of wafer revenue, 5-nanometer for 36 per cent, and 7-nanometer for 13 per cent. Together, everything at 7-nanometer and below, which TSMC calls its advanced technologies, was 74 per cent of wafer revenue.1
The mix is not static; it ratchets toward the newest node as each ramps. One quarter earlier, in the fourth quarter of 2025, 3-nanometer was 28 per cent of wafer revenue and the advanced-technology share was 77 per cent.3 The quarter-to-quarter wobble reflects product cycles, not a loss of lead; the structural fact is that a large and growing majority of TSMC's wafers are sold at the frontier. Behind that frontier sits an operational moat that is easy to under-count: in 2025 the company ran 305 distinct process technologies and manufactured 12,682 products for 534 customers.4 The breadth is the switching cost. A design taped out to TSMC's process design kit, tuned to its yield characteristics over months, does not move to another foundry without being substantially re-engineered — and there is no other foundry at the leading edge to move it to.
One platform, and the bottleneck that gates it
The AI cycle has rewritten what TSMC sells. High-performance computing — the platform that bundles AI accelerators, server CPUs, GPUs, and networking silicon — was 61 per cent of revenue in the first quarter of 2026, against 26 per cent for smartphones, the segment that defined the company for a decade.2 That is the concentration to watch: not a customer count but a demand mix, in which a single end-market now carries the majority of the business, and the health of that end-market is the health of TSMC.
The subtler point is that the binding constraint on AI silicon is no longer only the transistor. It is the packaging. An AI accelerator is not one die; it is a large logic die surrounded by stacks of high-bandwidth memory, and those pieces have to be assembled onto a single substrate that can carry the bandwidth between them. TSMC's technology for that step is CoWoS.
That is why the packaging line item has moved from a footnote to a strategic priority in the company's own capital planning. When TSMC's board approved its capital appropriations, the roughly US$44,962m authorised was earmarked not only for advanced-technology and fab construction but explicitly for the installation and upgrade of advanced packaging capacity.4 A foundry naming packaging alongside the leading-edge fab as a first-order call on capital is telling you where the scarcity is. The reason the moat quantifies so cleanly here is that the customer has nowhere else to go: the accelerator needs the node and the packaging, and TSMC is the only supplier of both at volume. Management guided the current quarter to US$39.0-40.2bn of revenue, at a gross margin of 65.5 to 67.5 per cent1 — pricing power that survives contact with the largest, most sophisticated buyers in the industry.
The binding constraint on AI silicon is no longer only the transistor. It is the packaging.
The capex is the moat, and it relocates the risk
A process lead has to be re-bought every year. TSMC's 2025 capital expenditure was NT$1,272.41bn, about US$41.0bn at the rate the company reported.5 For 2026 it has set a capital budget of US$52-56bn.3 That is the engine: spend at the frontier, in advance of the demand, to keep the node lead and the packaging capacity that let the frontier be sold at 66 per cent gross margin.
The cadence beneath the quarters confirms the demand is real, not guided. Reported monthly, revenue for May 2026 was NT$416.98bn, up 30.1 per cent on the year, and the first five months of 2026 totalled NT$1,961.80bn, up 30.0 per cent.6 For scale, full-year 2025 revenue was NT$3,809.05bn, with net income of NT$1,717.88bn.4 This is a company compounding at 30 per cent off a base measured in the hundreds of billions of dollars.
Here is where following the incentives changes the reading. Capital spending is inherently a bet: the money goes out now, against demand that may or may not arrive when the fab is ready. TSMC's discipline about that bet — building close to demand rather than far ahead of it — is what manufactures the scarcity its margin depends on. And that scarcity relocates the real risk. A hyperscaler that cannot secure enough leading-edge wafers and CoWoS slots does not get to blame the foundry; it simply builds fewer AI systems than it wanted to. The obvious risk in any TSMC discussion is geographic — the concentration of the most advanced capacity on one island. The binding risk, the one the numbers actually describe, is capacity: how much the company chooses to build, and who is left short when it builds conservatively. The first is a tail event. The second is the business, every quarter.
The tape
Walled off from the business, and secondary to it: TSMC lists in the United States as an American depositary receipt on the New York Stock Exchange under the ticker TSM, and the current quote is worth reading against the fundamentals above rather than in isolation.7 With the company guiding the current quarter to US$39.0-40.2bn,1 the market is not being asked to price whether TSMC holds the leading edge — the filings settle that — but whether the node lead, the CoWoS chokepoint, and the mid-sixties gross margin can all persist as demand leans on one platform and the capital bill climbs past US$50bn a year. No target and no recommendation here; the business is the story, the tape is the footnote.
Go deeper
Start with the primary documents, all free on SEC EDGAR and TSMC's investor site. The quarterly earnings releases carry the node mix, the margins, and the forward guidance;1 the accompanying investor presentations add the platform split and the capital-expenditure figure, which the press release omits.2 To judge the moat yourself, line up the advanced-technology share of wafer revenue across several quarters and watch whether 3-nanometer keeps climbing as a share of the mix; then read that against the 2026 capital budget3 to see whether the spend is keeping pace with the node transition. For the underlying trend, track the monthly revenue releases, which land in the first days of each month and are the earliest read on whether the 30 per cent growth rate is holding.8 The deepest single source is the annual report on Form 20-F, filed 16 April 2026, where the segment detail, customer and geographic concentration, and the full risk-factor set live in one place.9 The question worth holding across all of it: whether a moat measured in node-years and packaging slots stays as wide when the demand behind it narrows to a single platform.
Sources
- SEC EDGAR — TSMC Form 6-K, Exhibit 99.1, first-quarter 2026 earnings release: revenue US$35.90bn (+40.6% YoY), gross margin 66.2%, operating margin 58.1%, net margin 50.5%, diluted EPS NT$22.08; wafer revenue by node (3nm 25%, 5nm 36%, 7nm 13%, 7nm-and-below 74%); Q2 2026 guidance US$39.0-40.2bn at 65.5-67.5% gross margin
- SEC EDGAR — TSMC Form 6-K, Exhibit 99.2, first-quarter 2026 investor presentation: revenue by platform (HPC 61%, smartphone 26%, IoT 6%, automotive 4%); Q1 2026 capital expenditure NT$350.76bn (~US$11.1bn)
- SEC EDGAR — TSMC Form 6-K, Exhibit 99.1, fourth-quarter 2025 earnings release: Q4 revenue US$33.73bn, gross margin 62.3%, 3nm 28% and advanced technologies 77% of wafer revenue; 2026 capital budget US$52-56bn
- SEC EDGAR — TSMC Form 6-K (10 Feb 2026), board resolutions and 2025 results: full-year 2025 revenue NT$3,809.05bn, net income NT$1,717.88bn, diluted EPS NT$66.25; 305 process technologies, 12,682 products, 534 customers in 2025; capital appropriations of ~US$44,962m including installation and upgrade of advanced packaging capacity
- SEC EDGAR — TSMC Form 6-K, Exhibit 99.2, fourth-quarter 2025 investor presentation: full-year 2025 capital expenditure NT$1,272.41bn (~US$41.0bn)
- SEC EDGAR — TSMC Form 6-K (10 Jun 2026), May 2026 monthly revenue: NT$416.98bn, +30.1% YoY; January-May 2026 NT$1,961.80bn, +30.0% YoY
- New York Stock Exchange — TSM (Taiwan Semiconductor Manufacturing Company, ADR) listing and quote: listing venue and current market data for the tape
- TSMC Investor Relations — 2026 monthly revenue: unaudited monthly net revenue figures and year-over-year changes (Jan-May 2026 shown, January-May total NT$1,961.80bn)
- SEC EDGAR — TSMC Annual Report on Form 20-F for fiscal year ended 31 December 2025 (filed 16 April 2026): segment detail, customer and geographic concentration, and risk factors